Techniques and Tools for Product-Specific Analysis Templates
Towards Enhanced CAD-CAE Interoperability for Simulation-Based Design and Related Topics
Peak, R. S.; (2002) , 2002 International Conference on Electronics Packaging (ICEP), April 17-19, 2002, Tokyo, Japan.
Design engineers are becoming increasingly aware of “analysis template” pockets that exist in their product domain. For example, thermal resistance and interconnect reliability analysis are common templates for electronic chip packages, while tire-roadway templates exist to verify handling, durability, and slip requirements. Such templates may be captured as paper-based notes and design standards, as well as loosely structured spreadsheets and electronic workbooks. Often, however, they are not articulated in any persistent form.
Some CAD/E software vendors are offering pre-packaged analysis template catalogs like the above; however, they are typically dependent on a specific toolset and do not present design-analysis idealization associativity to the user. Thus, it is difficult to adapt, extend, or transfer analysis template knowledge. As noted in places like the 2001 International Technology Roadmap for Semiconductors (ITRS), domain- and tool-independent techniques and related standards are necessary.
This paper overviews infrastructure needs and emerging analysis template theory and methodology that addresses such issues. Patterns that naturally exist in between traditional CAD and CAE models are summarized, along with their embodiment in a knowledge representation known as constrained objects. Industrial applications for airframe structural analysis, circuit board thermomechanical analysis, and chip package thermal resistance analysis are noted.
This approach enhances knowledge capture, modularity, and reusability, as well as improves automation (e.g., decreasing total simulation cycle time by 75%). The object patterns also identify where best to apply information technologies like STEP, XML, CORBA/SOAP, and web services. We believe further benefits are possible if these patterns are combined with other efforts to enable ubiquitous analysis template technology. Trends and needs towards this end are discussed, including analogies with electronics like JEDEC package standards and mechanical subsystems.