Using Standards-based Approaches for
Electronics Product Design and Life Cycle Support

Extended Lecture · Shinshu University · Nagano City, Japan · 13:00-17:00 · April 22, 2002


Russell S. Peak, PhD

Senior Researcher

Manufacturing Research Center

Georgia Institute of Technology


The 2001 International Technology Roadmap for Semiconductors (ITRS)[1] identifies “Difficult Challenges” like the following in the “Design Technology” and “Modeling and Simulation” topic areas:

Design sharing and reuse: Tool interoperability, a standard integrated circuit information model, integration of multi-vendor and internal design technology, reduction of integration cost.

Software module integration: Seamless integration of simulation modules with a focus on interplay and interfacing of modules in order to enhance design effectiveness.


Engineers receive a significant education in traditional mathematics and its application to physical behavior modeling.  Addressing the above challenges, however, requires additional techniques like information modeling and knowledge representation (which are based in computer science and modern mathematics).  This lecture introduces attendees to such techniques and overviews related standards and tools:


1)      Introduction to engineering information technology

a)      The Express information modeling language (ISO 10303-11)

b)      The STEP family of product model standards (ISO 10303 series)

c)      Engineering frameworks

i)        "Helping people, their models, and their tools work together more effectively"

ii)       Typical gaps today

iii)     Solution approaches

iv)     The role of information technology standards (ISO, OMG, W3C, etc.)

2)      Applications to electronics design, analysis, and life cycle support

a)      End user overview of STEP AP210 for electronics (ISO 10303-210)

b)      Highlights of emerging standards-based tools and techniques

i)        Hands-on exercises (optional for attendees with laptops - download location is provided below)


This extended lecture includes selected portions from the 
Georgia Tech graduate course. 


Background and reference material is available at places like the following:



Lecture Outline

Follow hyperlinks for material for each section

Click here to download a zip package of the full lecture (22 MB).



0           Lecture introduction & objectives


1           Introduction to engineering information technology


1.1          Information modeling and knowledge representations

1.1.1          The STEP EXPRESS information modeling language (ISO 10303-11)

1.1.2          The constrained object (COB) knowledge representation

1.1.3          Summary


1.2          The STEP family of product model standards (ISO 10303 series)

1.2.1          An executive summary of STEP and the PDES Inc. consortium

1.2.2          Introduction to the structure of the STEP standards         An example rich product model: AP209 for finite element analysis models         More on the structure of STEP


1.3          Standards-based engineering frameworks

1.3.1          An overview of issues and progress         A semantic gap example - wysiNwyg

1.3.2          Progress towards standards-based gap-filling applications


1.4          Summary & recommendations



2           Applications to electronics design, analysis, and life cycle support
(including an end user overview of STEP AP210 for electronics: ISO 10303-210)
Index presentation[2]

2.1          Motivation

2.2          Introduction to AP210

2.3          Example business drivers (Rockwell Collins)

2.4          Content of AP210

2.5          Status and example implementations (PDES Inc. Electromechanical Pilot overview)

2.6          Vendor examples (LKSoft)

2.7          STEP-Book AP210 Usage Overview with Hands-on Exercises (see tool access below)

2.8          AP210 usage in the product development process

2.9          Summary & recommendations



3           Lecture summary & recommendations



Extensions to this material and other resources are available to consortia members and project sponsors.  Contact the author for access information.  R&D assistance and onsite short courses are also available.

Tool Access for Hands-On Exercises


For the hands-on exercises referenced above, you can obtain an alpha version of the STEP-Book AP210 tool as follows:


1. Install prerequisite Java aspects as instructed here:


(Related to Installation of JSDAI and JSDAI-Applications)


2. Download and install this tool (a special alpha version provided for the course by LKSoft)


Install it using the evaluation license. This contains the JSDAI-based STEP-Book AP210 and examples. 


After installation, see "Known Limitations" and other usage instructions as given in the Start Menu program directory.  The above slides provide other usage hints and examples. 


If you have any questions or feedback about installing and operating STEP-Book AP210, please contact


·         Groups and individuals referenced in the above material (especially the Electromechanical Pilot and other PDES Inc. groups).

·         Shinshu University and Shinko Electric for helping to arrange the lecture (especially Ryuichi Matsuki and Shin’ichi Wakabayashi).

·         Ryuichi Matsuki and Miyako Wilson for translation assistance during the lecture.

·         Tom Thurman (Rockwell Collins) for extra help with the AP210 material.

·         Giedrius Liutkus and Lothar Klein (LKSoft) for special efforts to provide an early release of the STEP-Book toolkit for trial usage.

·         Colleagues and students at Georgia Tech.


Instructor Biosketch

Russell S. Peak is a Senior Researcher in the Manufacturing Research Center at the Georgia Institute of Technology.  He received all his degrees from Georgia Tech in the School of Mechanical Engineering.  His industrial experience includes business telephone design at AT&T Bell Laboratories and analysis integration investigation as a Visiting Researcher at the Hitachi Mechanical Engineering Research Laboratory in Japan.

        Dr. Peak is the lead developer of constrained objects (COBs), the multi-representation architecture (MRA) for CAD-CAE interoperability, and context-based analysis models (CBAMs) - a knowledge pattern that explicitly captures design-analysis associativity using object and constraint graph techniques.  His research specialty is analysis integration for simulation-based design (SBD), with applications including electronic packaging and structural analysis. 

        He has authored and co-authored a variety of publications, holds several U. S. patents, and is a member of ASME, IEEE, and the U. S. Association of Computational Mechanics. He serves on the Technical Advisory Committee of PDES Inc., an international consortium furthering the development and usage of engineering information technology standards.



[1] See as addressed in

[2] Includes content indicted in the subsequent subsections unless otherwise linked.